The Heterogeneous Integration Department at the Institute of Microelectronics (IME) is seeking a passionate and skilled Principal Scientist to join our team. This role is pivotal in advancing state-of-the-art advanced packaging technologies such as Filp chip bonding, FOWLP, chip-to-wafer and wafer-to-wafer hybrid bonding processes, developing cutting-edge heterogenous integration process flow for 2.5D and 3D packaging applications, and conducting electrical and reliability characterization. The position provides an exciting opportunity to contribute to groundbreaking technologies and collaborate with a dynamic team of researchers and external stakeholders.

Key Responsibilities

• To develop new process integration flows for flip-chip, hybrid bonding, and FOWLP-based applications.
• Conceive and plan projects involving new materials, advanced process-integration approaches, and innovative concepts.
• Collaborate with internal and external partners to address technology roadmaps, process capability requirements, and business challenges.
• Lead high-impact projects with manageable risks and mentor less-experienced colleagues.
• Demonstrate flexibility in responsibilities and a proactive approach to taking on additional tasks.
• Investigate and refine integration process flows for interposer fabrication, with a focus on new materials such as liner dielectrics, ALD barriers, and copper, and alternative TSV fill applications.
• Explore cost-effective integration for inter-dielectric gap-fill-based processes.
• Manage wafer-level and die-level warpage to meet process requirements.
• Optimize die-bonding processes, including the selection of low-temperature organic and inorganic bonding materials, surface preparation, and bonding methods.
• Conduct engineering experiments for process characterization to drive quality and yield improvements.
• Perform reliability characterization of advanced packages such as hybrid-bonded packages, FOWLP, and CPO to ensure robustness and long-term performance.
•  Act as a subject matter expert (SME) for both internal and external stakeholders, providing guidance and expertise.
• Inspire and mentor young talent in semiconductor technology, contributing to workforce development in the field.
• Demonstrate teamwork skills with a focus on developing good team dynamics.
•  Skilled at effectively prioritizing multiple and sophisticated tasks.

Qualifications

• PhD in Materials Science and Engineering, Mechanical or Chemical Engineering, Electronics, Electrical and Computer Engineering, or a related field.
• 2 to 5 years of experience in Advanced packaging such as FOWLP, Flip Chip bonding, Chip to wafer and or wafer to wafer hybrid component integration, 2.5D/3D heterogenous integration applications.
• Knowledge in Advanced packaging materials, process and equipment technologies. Basic knowledge in failure analysis, preferable.
• Strong analytical and problem-solving skills.  Proficiency in data analysis and interpretation and design of experiments.
• Ability to work collaboratively in a research-oriented environment (OEMs, customers, and Internal stakeholders). Demonstrated ability to manage multiple tasks and projects simultaneously.
• Demonstrated expertise in heterogeneous integration, hybrid bonding, and advanced packaging processes.
• Proven ability to troubleshoot and resolve process-related challenges.