Key Responsibilities

• Develop and optimize wafer-to-wafer hybrid bonding processes for advanced semiconductor packaging.
• Design and execute DOE to improve process capability, yield, and reliability.
• Develop surface preparation, cleaning, plasma activation, bonding, and post-bond annealing processes.Investigate bonding defects, including voids, contamination, misalignment, and interface failures, through systematic root-cause analysis.
• Collaborate with design, integration, FAB, equipment, and reliability teams to develop robust bonding solutions.
• Evaluate and qualify new bonding equipment, materials, and emerging technologies.
• Perform wafer characterization using advanced metrology and failure analysis techniques.
• Analyse process data, establish process control methods, and document technical results.
• Contribute to technology innovation through patents, publications, and collaboration with internal and external partners.
  
  

Qualifications

• Ph.D. in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Chemistry or a related discipline.
• Hands-on experience in semiconductor process development within a cleanroom environment.
• Experience in hybrid bonding, wafer bonding, advanced packaging, semiconductor assembly, or related process modules is preferred.
• Strong analytical and problem-solving skills with experience in DOE and statistical data analysis.
• Self-motivated team player with excellent communication skills and a passion for developing innovative semiconductor technologies.