Senior Advanced Packaging Design Enablement and PDK

Seeking highly skilled Advanced Packaging design enablement researcher. The role focuses on development, validation and deployment of 2.5 Interposer, 3D hybrid bonding, 3.5D large package, reference flows. The successful candidate will collaborate with process integration, package design, EDA vendors, design enablement teams, and customers to create robust design infrastructures that accelerate adoption of advanced packaging technologies across AI, HPC, networking, mobile, and automotive applications.

Key Responsibilities

Reference Flow Development

• Define, implement and test end-to-end reference flows for advanced package design.
• Develop automated methodologies covering:

• • Die planning and partitioning
  • Interposer/package floorplanning
  • Signal, power, and clock routing
  • Package-aware implementation
  • Physical verification and signoff 
  • Reliability verification
  • Manufacturing sign off
• Create workflow automation, scripts, and design utilities to improve design productivity.
• Validate flows across leading EDA platforms including Cadence, Synopsys, Siemens EDA, and Ansys tool

Design Enablement & Validation

• Establish correlation between design simulation and manufacturing process.
• Validate PDKs and flows using internal test vehicles and customer designs.
• Develop extraction methodologies for:

• • Interposer parasitics
  • Package parasitics
  • TSV modeling
  • Hybrid bond interconnect modeling
  • Power delivery networks

• Support signal integrity (SI), power integrity (PI), thermal, and mechanical analysis flows.
• Develop documentation, application notes, training materials, and design guidelines.

Cross-Functional Collaboration

• Work closely with process integration, device engineering, packaging technology development, and manufacturing teams.
• Collaborate with EDA vendors to enable new advanced packaging features and methodologies.
• Support strategic customers with design onboarding and technical enablement.
• Drive ecosystem development for heterogeneous integration and advanced packaging technologies.

Required Qualifications

• MS or PhD in Electrical Engineering, Computer Engineering, Materials Science, Physics, or related field.
• 4+ years of experience in semiconductor design enablement, PDK development, physical design, or advanced packaging.
• Experience developing or supporting semiconductor PDKs.
• Strong knowledge of physical verification methodologies including DRC, LVS, ERC, and extraction flows.
• Experience with scripting and automation using Python, SKILL, Perl, or similar languages.

Success Metrics

• Successful deployment of reference flows with customers and internal STCO teams.
• Improved design productivity and reduced design cycle time.
• High correlation between design signoff and manufacturing results.
• Adoption of advanced packaging technologies across strategic customer programs.