Job Description

As part of National Semiconductor Translation and Innovation Center (NSTIC), the candidate will be involved in the development of heterogeneous integration process for realizing multi-functional photonic devices. The candidate will be involved in various back-end-of-line (BEOL) process modules, such as chemical and plasma-based cleaning, chemical mechanical polishing (CMP), dicing, backgrinding, and die-to-wafer bonding.

The candidate will work closely with people of diverse expertise.

Job Responsibilities:

• Develop, design, and optimize die-to-wafer bonding process employing III-V semiconductor material, Lithium Niobate on Insulator (LNOI), and Si-based material platforms. 
• Design of experiments (DOE) for various Die-to-Wafer (D2W) bonding methodologies.
• Liaise between design, fabrication, and testing teams to ensure smooth process integration and device fabrication.
• Metrology, data analysis, and documentation
• Present and discuss experimental data to the team
  
  

Job Requirements:

• Degree in Electronics Engineering, Microelectronics, Physics, Chemistry, or equivalent.
• Experience in semiconductor industry is preferred, particularly with wafer-to-wafer and die-to-wafer bonding process.
• Good critical thinking and problem-solving ability.
• Able to work with cross-functional team, with good communication/presentation skill.
• Able to work in a fast-paced and collaborative environment