About the Role

We are seeking an accomplished Principal Scientist / Senior Principal Scientist to provide scientific leadership and strategic direction for our front-end semiconductor research and development domain. This is a senior technical leadership position for an individual who combines deep technical mastery of front-end semiconductor process technology with the strategic vision to shape a multi-year R&D roadmap, the credibility to secure large-scale programme funding, and the leadership skills to build capability and talent across a research organisation.

The successful candidate will own the domain's R&D strategy and technology portfolio end-to-end — from technology foresighting and capability building, through to industry validation, translation, and commercialisation — and will represent the organisation as a recognised technical authority to industry partners, government agencies, and the global research community.

This is a unique opportunity for a seasoned semiconductor scientist to shape the future direction of front-end technology research in Singapore, working at the interface of fundamental research, industrial application, and national strategic priorities for the semiconductor sector.

Key Responsibilities

1. Technology Strategy & Foresight

• Own and continuously evolve the R&D strategy and technology roadmap for the front-end semiconductor domain, aligned with global industry trends and national economic priorities.
• Conduct technology foresighting to identify emerging and disruptive front-end technologies (e.g., advanced logic and memory devices, novel materials, next-generation lithography and patterning, advanced process integration, heterogeneous and 3D integration at the wafer level) with the potential to reshape the semiconductor value chain.
• Translate technology foresight into actionable capability-building plans, research programmes, and investment priorities.
• Benchmark the organisation's capabilities against leading global research institutes, foundries, IDMs, and equipment/materials suppliers.

Key Responsibilities

2. Portfolio & Programme Leadership

• Build, manage, and continuously refresh a balanced portfolio of exploratory (blue-sky) and industry-linked research projects across the front-end domain.
• Lead the conceptualisation, proposal development, and securing of large, multi-year research programmes and grants from government agencies, industry consortia, and private-sector partners.
• Set technical direction, milestones, and success metrics for programmes; oversee execution to ensure scientific rigour, delivery against milestones, and impactful outcomes.
• Manage programme budgets and resource allocation in collaboration with programme management and finance functions.

Key Responsibilities

3. Industry Engagement, Validation & Translation

• Build and maintain deep, trusted relationships with semiconductor foundries, IDMs, fabless companies, equipment and materials suppliers, and ecosystem partners.
• Lead industry-relevant projects that validate research outcomes against real manufacturing and device requirements, driving translation of lab-scale results into industry-ready technologies.
• Identify and develop new industry collaboration opportunities, joint labs, and consortia that expand the organisation's impact and relevance to the sector.
• Act as a trusted technical advisor to industry partners and government stakeholders on front-end semiconductor technology directions.

Key Responsibilities

4. Scientific & Technical Leadership

• Serve as the organisation's recognised technical authority and thought leader in front-end semiconductor technology, both internally and externally.
• Personally contribute to and guide high-impact research, ensuring scientific excellence and originality across the portfolio.
• Publish in leading peer-reviewed journals and present at premier international conferences (e.g., IEDM, VLSI Symposium, IITC, SPIE Advanced Lithography); build and protect a strong intellectual property portfolio.
• Provide technical mentorship and guidance to senior scientists and research leads across the domain.

Key Responsibilities

5. Capability & Talent Building

• Shape the long-term capability-building plan for the domain, including infrastructure, equipment, and toolsets required to stay at the technology frontier.
• Attract, develop, and retain top scientific talent; build a strong pipeline of researchers, engineers, and future technical leaders within the domain.
• Foster a culture of scientific excellence, curiosity, collaboration, and translational impact.

6. Organisational & National Impact

• Represent the organisation on relevant national and international technology advisory panels, working groups, and standards bodies.
• Contribute to national semiconductor ecosystem strategy discussions, providing scientific input to policymakers and agency leadership.
• Champion the domain's contributions to the broader mission of strengthening the semiconductor sector's competitiveness and resilience.

Eligibility Criteria - Education

• PhD (or equivalent doctoral qualification) in Electrical/Electronic Engineering, Materials Science, Physics, Chemistry, or a closely related discipline, with a specialisation relevant to semiconductor front-end process technology or device physics.

Eligibility Criteria - Experience

• More than 15 years of relevant post-PhD experience in the front-end semiconductor industry and/or leading semiconductor research institutions, with a demonstrated trajectory of increasing technical and strategic responsibility.
• Substantial hands-on experience across one or more front-end domains such as:
• Advanced logic/memory device architecture and integration
• Transistor technology (e.g., FinFET, gate-all-around, or beyond-CMOS device concepts)
• Advanced materials (high-k/metal gate, novel channel materials, 2D materials, etc.)
• Lithography, patterning, and process integration
• Wafer-level 3D integration and heterogeneous integration
• Process/device characterisation and reliability
• Proven track record of defining and leading technology roadmaps and translating strategic foresight into funded, delivered research programmes.
• Demonstrated success in securing large-scale competitive funding (government grants, industry-sponsored programmes, or equivalent) as a principal investigator or programme lead.
• Established history of industry collaboration, including direct engagement with foundries, IDMs, or semiconductor equipment/materials companies, resulting in tangible technology transfer or co-development outcomes.
• Strong record of high-impact peer-reviewed publications and/or patents in front-end semiconductor technology.
• Prior experience building, leading, or mentoring technical teams, with evidence of developing scientific talent.

Eligibility Criteria - Skills & Attributes

• Exceptional strategic thinking, with the ability to translate long-range technology foresight into concrete, resourced research plans.
• Strong scientific credibility and gravitas, able to command respect from both deep technical specialists and senior industry/government stakeholders.
• Excellent programme and stakeholder management skills, with experience navigating complex, multi-partner research collaborations.
• Outstanding written and verbal communication skills, including the ability to present complex technical concepts to varied audiences (from bench scientists to C-suite executives and policymakers).
• Entrepreneurial mindset with a bias toward translational impact, balanced with scientific rigour.
• Strong external network within the global semiconductor research and industry community.
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Eligibility Criteria - Preferred (not mandatory)

• Prior experience in a national research institute, university spin-off, or corporate central R&D function with a mandate spanning both exploratory and applied research.
• Experience operating within or engaging with the Asia-Pacific semiconductor ecosystem, particularly Singapore's.
• Experience serving on international technical committees, advisory boards, or standards bodies.

The above eligibility criteria are indicative; additional selection criteria may be applied in line with prevailing recruitment policies. Only shortlisted candidates will be notified.